hwClkInWorkMode
HUAWEI-CLK-MIB ·
.1.3.6.1.4.1.2011.6.25.1.1.1.3
Object
column
r/w
Enumeration
Clock source type. Includes the line clock source, BITS clock source, and local surge source. If it is line clock source of a CES port, the clock source type may be CES line or CES SRTS clock source. If it is BITS clock source, the clock source type may be 2 MHZ or EL clock source of BITS0, or 2 MHZ or EL clock source of BITS1. If the value is 1, it indicates that a clock source is not configured. Options: 1.none(1) - indicates that clock source not configured 2.sysLine(2) - indicates that line clock source that needs to specify frame/slot/port 3.cesLine(3) - indicates that line_clk of a CES clock source 4.cesSrts(4) - indicates that srts_clk of a CES clock source 5.e1Bits0(5) - indicates that EL type of a BITS0 clock source 6.e1Bits1(6) - indicates that EL type of a BITS1 clock source 7.f2mhzBits0(7) - indicates that 2MHZ type of a BITS0 clock source 8.f2mhzBits1(8) - indicates that 2MHZ type of a BITS1 clock source 9.msuSdh(9) - indicates that sdh_clk of an MSU clock source 10.msuTdm(10) - indicates that tdm_clk of an MSU clock source 11.localSurge(11) - indicates that local surge clock 12.xpm8k(12) - indicates that xpm-8k type of a xpm-8k clock source 13.gPON(13) - indicates that 2MHZ type of a clock source at H601GP1A board 14.pkt1588(14) - indicates that frequency synchronization from 1588 15.pw(15) - indicates that Pseudo-Wire clock source 16.copa(16) - indicates that EL clock source of H601COPA board 17.adaptClock(17) - indicates that clock adapt from CESoP 18.aCMClock(18) - indicates that ACM clock 19.t1Bits0(19) - indicates that TL type of a BITS0 clock source 20.t1Bits1(20) - indicates that TL type of a BITS1 clock source 21.system(21) - indicates that system clock source 22.acr1588(22) - indicates that 1588ACR clock source 23.syncEth(23) - indicates that syncEth clock source 24.pvx2m(24) - indicates that PVX-2M clock source
Context
- MIB
- HUAWEI-CLK-MIB
- OID
.1.3.6.1.4.1.2011.6.25.1.1.1.3- Type
- column
- Access
- readwrite
- Status
- current
- Parent
- hwClockInManageEntry
- Table
- hwClockInManageTable
- Siblings
- 11
Syntax
Enumeration
Values & Constraints
Enumerated Values
1 | none |
2 | sysLine |
3 | cesLine |
4 | cesSrts |
5 | e1Bits0 |
6 | e1Bits1 |
7 | f2mhzBits0 |
8 | f2mhzBits1 |
9 | msuSdh |
10 | msuTdm |
11 | localSurge |
12 | xpm8k |
13 | gPON |
14 | pkt1588 |
15 | pw |
16 | copa |
17 | adaptClock |
18 | aCMClock |
19 | t1Bits0 |
20 | t1Bits1 |
21 | system |
22 | acr1588 |
23 | syncEth |
24 | pvx2m |
Related Objects
Sibling Objects
| Object | Type | Syntax | OID |
|---|---|---|---|
| hwClkInIndex Clock source index: ranging from 0 to 9. The value 255 indicates the local
clock source.
Range: 0-9 | 255 | column | Integer32 | .1.3.6.1.4.1.2011.6.25.1.1.1.1 |
| hwClkInClearFaultRecord Clear fault record of one clock source.
Options:
1.clearFaultRecord(1) -Clears fault records | column | Enumeration | .1.3.6.1.4.1.2011.6.25.1.1.1.10 |
| hwClkLockState Clock lock state.
Options:
1.locked(1) - indicates that the clock is locked
2.unlocked(2) - indicates that the clock is unlocked | column | Enumeration | .1.3.6.1.4.1.2011.6.25.1.1.1.11 |
| hwClkFreqDeviation Clock source freq-deviation-value
The value is ten times of actual frequency deviation value
Unit: 0.1ppm
The invalid value is 0x7fffffff | column | SNMPv2-SMIInteger32 | .1.3.6.1.4.1.2011.6.25.1.1.1.12 |
| hwClkInPostion The ifIndex of physical position of clock source. If the clock source
isn't a sysline clock, the value will be 0xFFFFFFFFFFFFFF.
The first byte indicates the NO. of CESoP index.
T… | column | SNMPv2-SMIInteger32 | .1.3.6.1.4.1.2011.6.25.1.1.1.2 |
| hwClkInOperStatus Clock source state.
Options:
1.none(1) - indicates that the clock source index isn't configured
2.normal(2) - indicates that the state of the clock source is active
3.… | column | Enumeration | .1.3.6.1.4.1.2011.6.25.1.1.1.4 |
| hwClkInRowStatus Clock Source operation:
A user can add a clock source or clear a clock source.
After a user adds a clock source,the clock works in trace mode.
After a user clears a clock source, … | column | SNMPv2-TCRowStatus | .1.3.6.1.4.1.2011.6.25.1.1.1.5 |
| hwClkInBitsImpedance BITS clock impedance type.The impedance value must be set when the clock source is a bits clock.
Options:
1. bitsImpedance75ohm(1) - indicates that the impedance of this BI… | column | Enumeration | .1.3.6.1.4.1.2011.6.25.1.1.1.6 |
| hwClkInBitsType BITS clock type:
Options:
1.bitsType2MHz(1) - indicates that the BITS clock type is 2MHz
2.bitsType2Mbps(2) - indicates that the BITS clock type is 2bps
3.bitsType64K… | column | Enumeration | .1.3.6.1.4.1.2011.6.25.1.1.1.7 |
| hwClkInQL Clock source quality level:
Options:
1. qlPRC(2) - indicates that primary reference clock
2. qlSsuA(4) - indicates that the clock signal comes from class I or class
… | column | Enumeration | .1.3.6.1.4.1.2011.6.25.1.1.1.8 |
| hwClkInFaultRecord Clock source fault record.
Options:
1.noFaultRecord(1) - indicates that there is no fault record
2.faultRecord(2) - indicates that the clock source had a fault record | column | Enumeration | .1.3.6.1.4.1.2011.6.25.1.1.1.9 |