hdlcTxClockPolarity

RAD-MIB · .1.3.6.1.4.1.164.3.1.6.5.1.1.6
MIB view Table view

Object

column r/w Enumeration 
normal  - The transmitted data is sampled at the middle of bit time
inverse - The transmitted data is sampled at the end of the bit time 
 			(high data rate/long cable).

Context

MIB
RAD-MIB
OID
.1.3.6.1.4.1.164.3.1.6.5.1.1.6
Type
column
Access
readwrite
Status
current
Parent
hdlcEntry

Syntax

Enumeration

Values & Constraints

No enumerated values or constraints recorded.