fsQosHwCpuRateLimitEntry

ARICENT-DIFFSERV-MIB · .1.3.6.1.4.1.29601.2.6.1.6.1.1

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Object

row

CPU Rate Limit table entry

Context

MIB: ARICENT-DIFFSERV-MIB
OID: .1.3.6.1.4.1.29601.2.6.1.6.1.1
Type: row
Status: current
Parent: fsQosHwCpuRateLimitTable
Table: fsQosHwCpuRateLimitTable
Children: 4

Syntax

No syntax metadata recorded.

Values & Constraints

No enumerated values or constraints recorded.