ifMauBIPErrorCount
IEEE8023-MAU-MIB ·
.1.3.111.2.802.3.1.13.1.2.3.1.4
Object
column
SNMPv2-SMICounter32
Generalized nonresettable counter. This counter
has a maximum increment rate of 10 000 counts per
second for 40 Gb/s implementations and 5 000 counts
per second for 100 Gb/ s implementations.
For 40/100GBASE-R PHYs, a count of BIP errors on the
PCS lane identified by ifPCSLaneIndex object. This
counter will not increment for other PHY types.
Increment the counter by one for each BIP error
detected during alignment marker removal in the
PCS identified by the ifPCSLaneIndex object.
If a Clause 45 MDIO Interface to the PCS is
present, then this object will map to the BIP error
counter for PCS lane number n, identified by the
ifPCSLaneIndex object
(see IEEE Std 802.3, 45.2.3.44 and 45.2.3.45).
Context
- MIB
- IEEE8023-MAU-MIB
- OID
.1.3.111.2.802.3.1.13.1.2.3.1.4- Type
- column
- Access
- readonly
- Status
- current
- Parent
- ifMauPerPCSLaneStatsEntry
- Table
- ifMauPerPCSLaneStatsTable
- Siblings
- 4
Syntax
SNMPv2-SMICounter32
- Source
- SNMPv2-SMICounter32
- Base type
Unsigned32
Values & Constraints
Type Constraints
range: 0..4294967295
Related Objects
Sibling Objects
| Object | Type | Syntax | OID |
|---|---|---|---|
| ifPCSLaneIndex This object provides the identification of the
PCS lane for which this ifMauPerPCSLaneStatsEntry
is applicable. This object can hold an integer value
from 0 to N-1, where N is t… | column | Unsigned32 | .1.3.111.2.802.3.1.13.1.2.3.1.1 |
| ifMauPPLFECCorrectedBlocks Generalized nonresettable counter. This counter has a
maximum increment rate of 1 200 000 counts per second
for 1000 Mb/s implementations, 5 000 000 counts per
second for 10 Gb… | column | SNMPv2-SMICounter64 | .1.3.111.2.802.3.1.13.1.2.3.1.2 |
| ifMauPPLFECUncorrectableBlocks Generalized nonresettable counter. This counter has a
maximum increment rate of 1 200 000 counts per second
for 1000 Mb/s implementations, 5 000 000 counts
per second for 10 Gb… | column | SNMPv2-SMICounter64 | .1.3.111.2.802.3.1.13.1.2.3.1.3 |
| ifMauPCStoPHYLaneMapping For 40/100GBASE-R PHYs, an array of PCS lane
identifiers. The indices of this array (0 to n?1)
denote the service interface lane number where n is
the number of PCS lanes in us… | column | SNMPv2-SMIUnsigned32 | .1.3.111.2.802.3.1.13.1.2.3.1.5 |