hdlcLoopbackState
ACE202-MIB ·
.1.3.6.1.4.1.164.3.1.6.5.1.1.5
Object
column
r/w
Enumeration
internal - All data coming from the network port is looped back external - All data comming from the line is looped back.
Context
- MIB
- ACE202-MIB
- OID
.1.3.6.1.4.1.164.3.1.6.5.1.1.5- Type
- column
- Access
- readwrite
- Status
- current
- Parent
- hdlcEntry
- Table
- hdlcTable
- Siblings
- 10
Syntax
Enumeration
Values & Constraints
No enumerated values or constraints recorded.
Related Objects
Sibling Objects
| Object | Type | Syntax | OID |
|---|---|---|---|
| hdlcProtocol The HDLC protocol type
V35 - HDLC encapsulated over V35
X21 - HDLC encapsulated over X21
RS530 - HDLC encapsulated over RS530 | column | Enumeration | .1.3.6.1.4.1.164.3.1.6.5.1.1.1 |
| hdlcLOF Total number of seconds the port is in Loss Of Frame state. | column | SNMPv2-SMIGauge32 | .1.3.6.1.4.1.164.3.1.6.5.1.1.10 |
| hdlcRxClockPolarity normal - The received data is sampled at the middle of bit time
inverse - The received data is sampled at the end of the bit time
(high data rate/long cable). | column | Enumeration | .1.3.6.1.4.1.164.3.1.6.5.1.1.11 |
| hdlcRateResolution The baud rate of the internal clock. | column | Enumeration | .1.3.6.1.4.1.164.3.1.6.5.1.1.2 |
| hdlcTxClockSource The baud rate of the internal clock. | column | Enumeration | .1.3.6.1.4.1.164.3.1.6.5.1.1.3 |
| hdlcTerminalMode . | column | Enumeration | .1.3.6.1.4.1.164.3.1.6.5.1.1.4 |
| hdlcTxClockPolarity normal - The transmitted data is sampled at the middle of bit time
inverse - The transmitted data is sampled at the end of the bit time
(high data rate/long cable). | column | Enumeration | .1.3.6.1.4.1.164.3.1.6.5.1.1.6 |
| hdlcFlowControl Enable/Disable the CTS/RTS flow control signals. | column | Enumeration | .1.3.6.1.4.1.164.3.1.6.5.1.1.7 |
| hdlcLineRate The rate values for HDLC are n*56/64Kbps, where 1<=n<=32, 64, 128
and the following values: 1544, 3088, 6176.
The rate values for HSSI is nMbps, where 1<=n<=52. | column | SNMPv2-SMIInteger32 | .1.3.6.1.4.1.164.3.1.6.5.1.1.8 |
| hdlcRxClockMode . | column | Enumeration | .1.3.6.1.4.1.164.3.1.6.5.1.1.9 |