tnPortFwHitlessLoadTimeOut

This is the time since the beginning of the init state
for the individual FPGA Hitless device currently being
loaded.  It is updated only when requested for display.
Timeout starts at 45 minutes.  Progress time displayed
will be = 45:00-current value.

MIB

TROPIC-SOFTWARE-MIB

OID

.1.3.6.1.4.1.7483.2.1.5.2.1.10.1.10

Type

column

Access

readonly

Status

current

Parent

tnPortFwEntry