sysDclFlipDelay

If one DCL flip occurred and a second one should be
performed, the time from the previous flip is checked.
If the time is shorter than the delay specified here,
the system should delay the flip operation until time reaches the specified delay.
For DXC the values are 1 minute to 4 minutes (1..4).
For Optimux-155-1 and Optimux-155-3 the values are: 0...60 Sec.
	0 means No Delay.

MIB

RAD-Dacs-MIB

OID

.1.3.6.1.4.1.164.3.3.1.2.2.1.1.4

Type

column

Access

readwrite

Status

current

Parent

sysDclEntry