sysCClkRevertiveTimeout
RAD-Dacs-MIB ·
.1.3.6.1.4.1.164.3.3.1.6.1.1.6
Object
column
r/w
Integer32
The time in seconds in which the system will monitor the higher level clock source, before decision to revert to that clock. In case the time is zero, revertive mode will be disabled.
Context
- MIB
- RAD-Dacs-MIB
- OID
.1.3.6.1.4.1.164.3.3.1.6.1.1.6- Type
- column
- Access
- readwrite
- Status
- current
- Parent
- sysCClkSrcEntry
Syntax
Integer32
Values & Constraints
No enumerated values or constraints recorded.