hpnsaPciBist

This optional register is used for control and status
of Built-in Self Test. Devices that don't support BIST
must always return a value of 0.
              
Bit     Description
---     ------------
 7      0=BIST not supported, 1=BIST supported
 6      Wrtie a 1 to invoke BIST. Devices resets the
	 bit when BIST is complet. Software should fail
	 device if BIST is not complete after 2 seconds.
5-4     Reserved
3-0     0=Device passed test, non-zero= device-specific
	 failure code.

MIB

HPNSAPCI-MIB

OID

.1.3.6.1.4.1.11.2.23.10.4.1.1.13

Type

column

Access

readonly

Status

mandatory

Parent

hpnsaPciEntry