hh3csLswTrapCpuCoreInfo

HH3C-LswTRAP-MIB · .1.3.6.1.4.1.25506.8.35.12.2.1
MIB view Table view

Object

scalar OctetString 
hh3cLswCpuCoreIndex,hh3cLswCpuCoreUsage,hh3cLswCpuCoreUsr,
hh3cLswCpuCoreSys,hh3cLswCpuCoreIrq,hh3cLswCpuCoreIdle.
          
Each line contains the following comma-separated values:
          
hh3cLswCpuCoreIndex(Integer32):CPU core index.
hh3cLswCpuCoreUsage(Unsigned32): Percentage of CPU core usage ,0~100
hh3cLswCpuCoreUsr(Unsigned32): Percentage of CPU core user usage ,0~100
hh3cLswCpuCoreSys(Unsigned32): Percentage of CPU core system usage ,0~100
hh3cLswCpuCoreIrq(Unsigned32): Percentage of CPU core interrupt usage ,0~100
hh3cLswCpuCoreIdle(Unsigned32): Percentage of CPU core idle usage ,0~100

Context

MIB
HH3C-LswTRAP-MIB
OID
.1.3.6.1.4.1.25506.8.35.12.2.1
Type
scalar
Access
notifyonly
Status
current
Parent
hh3csLswTRAPMibInfor

Syntax

OctetString

Values & Constraints

Object Constraints
range: 0-255