a3ComQosCtrlRateLimitPorts

A bit mask of interfaces that support the defined rate limit. 
Each interface is represented by a single bit. If that bit 
is set then the corresponding interface is a member of this  
control. The bits are assigned with the least significant bit  
of the first byte corresponding to ifIndex 1, the next 
bit corresponding to ifIndex 2 and so on.  
              
Note that each port can only be associated with a single rate  
limit per control. An error will be returned if the user tries  
to assign a port that already has a rate limit associated with  
it.

MIB

A3COM-SWITCHING-SYSTEMS-QOS-MIB

OID

.1.3.6.1.4.1.43.29.4.21.2.2.1.5

Type

column

Access

readwrite

Status

mandatory

Parent

a3ComQosCtrlRateLimitEntry