cpqSeEisaDmaTiming
CPQSTDEQ-MIB ·
.1.3.6.1.4.1.232.1.2.5.5.1.6
Object
column
mandatory
Enumeration
This value indicates the timing (transfer rate) associated with this configuration of the DMA channel.
Context
- MIB
- CPQSTDEQ-MIB
- OID
.1.3.6.1.4.1.232.1.2.5.5.1.6- Type
- column
- Access
- readonly
- Status
- mandatory
- Parent
- cpqSeEisaDmaEntry
- Table
- cpqSeEisaDmaTable
- Siblings
- 7
Syntax
Enumeration
Values & Constraints
Enumerated Values
1 | isaTiming |
2 | typeA |
3 | typeB |
4 | burstTypeC |
Related Objects
Sibling Objects
| Object | Type | Syntax | OID |
|---|---|---|---|
| cpqSeEisaDmaSlotIndex mandatory The EISA slot number of the board that registered the DMA
configuration this entry describes. | column | Integer32 | .1.3.6.1.4.1.232.1.2.5.5.1.1 |
| cpqSeEisaDmaFunctIndex mandatory The function in which this DMA configuration was registered. | column | Integer32 | .1.3.6.1.4.1.232.1.2.5.5.1.2 |
| cpqSeEisaDmaAllocIndex mandatory The index for this DMA channel allocation entry in the EISA
function block. | column | Integer32 | .1.3.6.1.4.1.232.1.2.5.5.1.3 |
| cpqSeEisaDmaChannel mandatory The DMA channel described in this entry. | column | Integer32 | .1.3.6.1.4.1.232.1.2.5.5.1.4 |
| cpqSeEisaDmaShare mandatory This value indicates if the DMA channel is shareable. | column | Enumeration | .1.3.6.1.4.1.232.1.2.5.5.1.5 |
| cpqSeEisaDmaXfer mandatory This value indicates the transfer size in bits used over this
DMA channel. | column | Integer32 | .1.3.6.1.4.1.232.1.2.5.5.1.7 |
| cpqSeEisaDmaXferCount mandatory This value indicates the addressing scheme for the DMA channel. | column | Enumeration | .1.3.6.1.4.1.232.1.2.5.5.1.8 |